About this course

What you'll learn

Concept of Timing Analysis

Timing Analysis tool basics

Building SDC file for constraining FPGA design

Advanced Optimisation Techniques for




Soft Processor hardware Development using Micro blaze

Developing system on a programming chip (soft processor based application)

Optimising design with tools

IO pin planning


Software Development Design with C

Timing Analysis

Applying constraints and viewing reports

Clock Constrains

Reset Constrains

FPGA Resources for DSP application

Hand on FPGA Board

Programmable Logic(PL)Implementation example

Processor System Implementation example

PS-PL Implementation example

Processor hardware development

Creating a IP Integrator Design

Creating a Micro blaze System in VIVADO

Creating a software Application using C in SDK

IP Creation

Creating IP in HDL

Creating IP in Math works HDL Coder

Developing system on a programmable chip(soft and hard processor based applications)

PS-PLAXI Interface Designing.